Alert button
Picture for Yuyang Zhang

Yuyang Zhang

Alert button

Let Real Images be as a Judger, Spotting Fake Images Synthesized with Generative Models

Add code
Bookmark button
Alert button
Mar 25, 2024
Ziyou Liang, Run Wang, Weifeng Liu, Yuyang Zhang, Wenyuan Yang, Lina Wang, Xingkai Wang

Viaarxiv icon

A Spatio-Temporal Graph Convolutional Network for Gesture Recognition from High-Density Electromyography

Add code
Bookmark button
Alert button
Dec 01, 2023
Wenjuan Zhong, Yuyang Zhang, Peiwen Fu, Wenxuan Xiong, Mingming Zhang

Viaarxiv icon

Predicting Continuous Locomotion Modes via Multidimensional Feature Learning from sEMG

Add code
Bookmark button
Alert button
Nov 13, 2023
Peiwen Fu, Wenjuan Zhong, Yuyang Zhang, Wenxuan Xiong, Yuzhou Lin, Yanlong Tai, Lin Meng, Mingming Zhang

Viaarxiv icon

Zero-shot Cross-lingual Transfer without Parallel Corpus

Add code
Bookmark button
Alert button
Oct 07, 2023
Yuyang Zhang, Xiaofeng Han, Baojun Wang

Viaarxiv icon

Gait Cycle-Inspired Learning Strategy for Continuous Prediction of Knee Joint Trajectory from sEMG

Add code
Bookmark button
Alert button
Jul 25, 2023
Xueming Fu, Hao Zheng, Luyan Liu, Wenjuan Zhong, Haowen Liu, Wenxuan Xiong, Yuyang Zhang, Yifeng Chen, Dong Wei, Mingjie Dong, Yefeng Zheng, Mingming Zhang

Figure 1 for Gait Cycle-Inspired Learning Strategy for Continuous Prediction of Knee Joint Trajectory from sEMG
Figure 2 for Gait Cycle-Inspired Learning Strategy for Continuous Prediction of Knee Joint Trajectory from sEMG
Figure 3 for Gait Cycle-Inspired Learning Strategy for Continuous Prediction of Knee Joint Trajectory from sEMG
Figure 4 for Gait Cycle-Inspired Learning Strategy for Continuous Prediction of Knee Joint Trajectory from sEMG
Viaarxiv icon

Online Planning of Uncertain MDPs under Temporal Tasks and Safe-Return Constraints

Add code
Bookmark button
Alert button
Feb 10, 2023
Yuyang Zhang, Meng Guo

Figure 1 for Online Planning of Uncertain MDPs under Temporal Tasks and Safe-Return Constraints
Figure 2 for Online Planning of Uncertain MDPs under Temporal Tasks and Safe-Return Constraints
Figure 3 for Online Planning of Uncertain MDPs under Temporal Tasks and Safe-Return Constraints
Viaarxiv icon

MTLDesc: Looking Wider to Describe Better

Add code
Bookmark button
Alert button
Mar 14, 2022
Changwei Wang, Rongtao Xu, Yuyang Zhang, Shibiao Xu, Weiliang Meng, Bin Fan, Xiaopeng Zhang

Figure 1 for MTLDesc: Looking Wider to Describe Better
Figure 2 for MTLDesc: Looking Wider to Describe Better
Figure 3 for MTLDesc: Looking Wider to Describe Better
Figure 4 for MTLDesc: Looking Wider to Describe Better
Viaarxiv icon

A Deep Learning Inference Scheme Based on Pipelined Matrix Multiplication Acceleration Design and Non-uniform Quantization

Add code
Bookmark button
Alert button
Oct 10, 2021
Yuyang Zhang, Dik Hin Leung, Min Guo, Yijia Xiao, Haoyue Liu, Yunfei Li, Jiyuan Zhang, Guan Wang, Zhen Chen

Figure 1 for A Deep Learning Inference Scheme Based on Pipelined Matrix Multiplication Acceleration Design and Non-uniform Quantization
Figure 2 for A Deep Learning Inference Scheme Based on Pipelined Matrix Multiplication Acceleration Design and Non-uniform Quantization
Figure 3 for A Deep Learning Inference Scheme Based on Pipelined Matrix Multiplication Acceleration Design and Non-uniform Quantization
Figure 4 for A Deep Learning Inference Scheme Based on Pipelined Matrix Multiplication Acceleration Design and Non-uniform Quantization
Viaarxiv icon

DyLex: Incorporating Dynamic Lexicons into BERT for Sequence Labeling

Add code
Bookmark button
Alert button
Sep 22, 2021
Baojun Wang, Zhao Zhang, Kun Xu, Guang-Yuan Hao, Yuyang Zhang, Lifeng Shang, Linlin Li, Xiao Chen, Xin Jiang, Qun Liu

Figure 1 for DyLex: Incorporating Dynamic Lexicons into BERT for Sequence Labeling
Figure 2 for DyLex: Incorporating Dynamic Lexicons into BERT for Sequence Labeling
Figure 3 for DyLex: Incorporating Dynamic Lexicons into BERT for Sequence Labeling
Figure 4 for DyLex: Incorporating Dynamic Lexicons into BERT for Sequence Labeling
Viaarxiv icon

iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform

Add code
Bookmark button
Alert button
Apr 11, 2021
Tian Gao, Zishen Wan, Yuyang Zhang, Bo Yu, Yanjun Zhang, Shaoshan Liu, Arijit Raychowdhury

Figure 1 for iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform
Figure 2 for iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform
Figure 3 for iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform
Figure 4 for iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform
Viaarxiv icon