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HW-NAS-Bench:Hardware-Aware Neural Architecture Search Benchmark

Mar 19, 2021
Chaojian Li, Zhongzhi Yu, Yonggan Fu, Yongan Zhang, Yang Zhao, Haoran You, Qixuan Yu, Yue Wang, Yingyan Lin

* Accepted at ICLR 2021 (Spotlight) 

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SmartDeal: Re-Modeling Deep Network Weights for Efficient Inference and Training

Jan 04, 2021
Xiaohan Chen, Yang Zhao, Yue Wang, Pengfei Xu, Haoran You, Chaojian Li, Yonggan Fu, Yingyan Lin, Zhangyang Wang

* arXiv admin note: substantial text overlap with arXiv:2005.03403 

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FracTrain: Fractionally Squeezing Bit Savings Both Temporally and Spatially for Efficient DNN Training

Dec 24, 2020
Yonggan Fu, Haoran You, Yang Zhao, Yue Wang, Chaojian Li, Kailash Gopalakrishnan, Zhangyang Wang, Yingyan Lin

* Accepted at NeurIPS 2020 

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DNA: Differentiable Network-Accelerator Co-Search

Oct 28, 2020
Yongan Zhang, Yonggan Fu, Weiwen Jiang, Chaojian Li, Haoran You, Meng Li, Vikas Chandra, Yingyan Lin

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ShiftAddNet: A Hardware-Inspired Deep Network

Oct 24, 2020
Haoran You, Xiaohan Chen, Yongan Zhang, Chaojian Li, Sicheng Li, Zihao Liu, Zhangyang Wang, Yingyan Lin

* Accepted by NeurIPS 2020 

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SmartExchange: Trading Higher-cost Memory Storage/Access for Lower-cost Computation

May 08, 2020
Yang Zhao, Xiaohan Chen, Yue Wang, Chaojian Li, Haoran You, Yonggan Fu, Yuan Xie, Zhangyang Wang, Yingyan Lin

* Accepted by 47th International Symposium on Computer Architecture (ISCA'2020) 

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A New MRAM-based Process In-Memory Accelerator for Efficient Neural Network Training with Floating Point Precision

Mar 02, 2020
Hongjie Wang, Yang Zhao, Chaojian Li, Yue Wang, Yingyan Lin

* Accepted by the IEEE International Symposium on Circuits and Systems 2020 (ISCAS'2020) 

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DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures

Feb 26, 2020
Yang Zhao, Chaojian Li, Yue Wang, Pengfei Xu, Yongan Zhang, Yingyan Lin

* Accepted by 45th International Conference on Acoustics, Speech, and Signal Processing (ICASSP'2020) 

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AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs

Jan 06, 2020
Pengfei Xu, Xiaofan Zhang, Cong Hao, Yang Zhao, Yongan Zhang, Yue Wang, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin

* Accepted by 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA'2020) 

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Drawing early-bird tickets: Towards more efficient training of deep networks

Sep 26, 2019
Haoran You, Chaojian Li, Pengfei Xu, Yonggan Fu, Yue Wang, Xiaohan Chen, Yingyan Lin, Zhangyang Wang, Richard G. Baraniuk

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