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Yonghua Lin

Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA

Oct 25, 2018
Junsong Wang, Qiuwen Lou, Xiaofan Zhang, Chao Zhu, Yonghua Lin, Deming Chen

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* Accepted by International Conference on Field-Programmable Logic and Applications (FPL'2018)

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