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A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators



Bingqian Lu , Zheyu Yan , Yiyu Shi , Shaolei Ren

* Accepted by and presented at the TinyML Research Symposium 2022 

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SWIM: Selective Write-Verify for Computing-in-Memory Neural Accelerators



Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi


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RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Search



Zheyu Yan , Weiwen Jiang , Xiaobo Sharon Hu , Yiyu Shi


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Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search



Zheyu Yan , Da-Cheng Juan , Xiaobo Sharon Hu , Yiyu Shi


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Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks



Lei Yang , Zheyu Yan , Meng Li , Hyoukjun Kwon , Liangzhen Lai , Tushar Krishna , Vikas Chandra , Weiwen Jiang , Yiyu Shi

* Accepted by DAC'20 

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Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators



Weiwen Jiang , Qiuwen Lou , Zheyu Yan , Lei Yang , Jingtong Hu , Xiaobo Sharon Hu , Yiyu Shi

* 10 pages, 7 figures 

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When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies



Zheyu Yan , Yiyu Shi , Wang Liao , Masanori Hashimoto , Xichuan Zhou , Cheng Zhuo

* 7 pages, 8 figures 

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