Picture for Jeff Zhang

Jeff Zhang

Harvard University

Generalist Foundation Models Are Not Clinical Enough for Hospital Operations

Add code
Nov 17, 2025
Viaarxiv icon

Repurposing the scientific literature with vision-language models

Add code
Feb 26, 2025
Viaarxiv icon

SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System

Add code
Nov 20, 2024
Figure 1 for SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System
Figure 2 for SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System
Figure 3 for SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System
Figure 4 for SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System
Viaarxiv icon

Multi-Dimensional Reconfigurable, Physically Composable Hybrid Diffractive Optical Neural Network

Add code
Nov 08, 2024
Figure 1 for Multi-Dimensional Reconfigurable, Physically Composable Hybrid Diffractive Optical Neural Network
Figure 2 for Multi-Dimensional Reconfigurable, Physically Composable Hybrid Diffractive Optical Neural Network
Figure 3 for Multi-Dimensional Reconfigurable, Physically Composable Hybrid Diffractive Optical Neural Network
Figure 4 for Multi-Dimensional Reconfigurable, Physically Composable Hybrid Diffractive Optical Neural Network
Viaarxiv icon

SCATTER: Algorithm-Circuit Co-Sparse Photonic Accelerator with Thermal-Tolerant, Power-Efficient In-situ Light Redistribution

Add code
Jul 07, 2024
Figure 1 for SCATTER: Algorithm-Circuit Co-Sparse Photonic Accelerator with Thermal-Tolerant, Power-Efficient In-situ Light Redistribution
Figure 2 for SCATTER: Algorithm-Circuit Co-Sparse Photonic Accelerator with Thermal-Tolerant, Power-Efficient In-situ Light Redistribution
Figure 3 for SCATTER: Algorithm-Circuit Co-Sparse Photonic Accelerator with Thermal-Tolerant, Power-Efficient In-situ Light Redistribution
Figure 4 for SCATTER: Algorithm-Circuit Co-Sparse Photonic Accelerator with Thermal-Tolerant, Power-Efficient In-situ Light Redistribution
Viaarxiv icon

Skip-SCAR: A Modular Approach to ObjectGoal Navigation with Sparsity and Adaptive Skips

Add code
May 23, 2024
Figure 1 for Skip-SCAR: A Modular Approach to ObjectGoal Navigation with Sparsity and Adaptive Skips
Figure 2 for Skip-SCAR: A Modular Approach to ObjectGoal Navigation with Sparsity and Adaptive Skips
Figure 3 for Skip-SCAR: A Modular Approach to ObjectGoal Navigation with Sparsity and Adaptive Skips
Figure 4 for Skip-SCAR: A Modular Approach to ObjectGoal Navigation with Sparsity and Adaptive Skips
Viaarxiv icon

Advanced Language Model-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis

Add code
Dec 02, 2023
Viaarxiv icon

Path Planning Under Uncertainty to Localize mmWave Sources

Add code
Mar 08, 2023
Figure 1 for Path Planning Under Uncertainty to Localize mmWave Sources
Figure 2 for Path Planning Under Uncertainty to Localize mmWave Sources
Figure 3 for Path Planning Under Uncertainty to Localize mmWave Sources
Figure 4 for Path Planning Under Uncertainty to Localize mmWave Sources
Viaarxiv icon

Millimeter Wave Wireless Assisted Robot Navigation with Link State Classification

Add code
Nov 05, 2021
Figure 1 for Millimeter Wave Wireless Assisted Robot Navigation with Link State Classification
Figure 2 for Millimeter Wave Wireless Assisted Robot Navigation with Link State Classification
Figure 3 for Millimeter Wave Wireless Assisted Robot Navigation with Link State Classification
Figure 4 for Millimeter Wave Wireless Assisted Robot Navigation with Link State Classification
Viaarxiv icon

RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance

Add code
May 22, 2021
Figure 1 for RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance
Figure 2 for RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance
Figure 3 for RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance
Figure 4 for RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance
Viaarxiv icon