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Luca Benini

D-ITET, ETH Zürich, Switzerland

ListenToJESD204B: A Lightweight Open-Source JESD204B IP Core for FPGA-Based Ultrasound Acquisition systems

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Aug 20, 2025
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A 66-Gb/s/5.5-W RISC-V Many-Core Cluster for 5G+ Software-Defined Radio Uplinks

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Aug 08, 2025
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HiM2SAM: Enhancing SAM2 with Hierarchical Motion Estimation and Memory Optimization towards Long-term Tracking

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Jul 10, 2025
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EdgeCodec: Onboard Lightweight High Fidelity Neural Compressor with Residual Vector Quantization

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Jul 08, 2025
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PhysioWave: A Multi-Scale Wavelet-Transformer for Physiological Signal Representation

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Jun 12, 2025
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WaveFormer: A Lightweight Transformer Model for sEMG-based Gesture Recognition

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Jun 12, 2025
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RobotxR1: Enabling Embodied Robotic Intelligence on Large Language Models through Closed-Loop Reinforcement Learning

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May 06, 2025
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Real-Time, Single-Ear, Wearable ECG Reconstruction, R-Peak Detection, and HR/HRV Monitoring

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May 03, 2025
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VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers

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Apr 15, 2025
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Enhancing Autonomous Driving Systems with On-Board Deployed Large Language Models

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Apr 15, 2025
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