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FAT: Training Neural Networks for Reliable Inference Under Hardware Faults

Nov 11, 2020
Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees Vissers


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Efficient Error-Tolerant Quantized Neural Network Accelerators

Dec 16, 2019
Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees Vissers

* 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) 
* 6 pages, 5 figures 

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Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Nov 21, 2018
Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees Vissers, John Wawrzynek, Kurt Keutzer

* To appear in the 27th International Symposium on Field-Programmable Gate Arrays, February 2019 

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Scaling Binarized Neural Networks on Reconfigurable Logic

Jan 27, 2017
Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella, Michaela Blott, Philip Leong, Magnus Jahre, Kees Vissers

* To appear in the PARMA-DITAM workshop at HiPEAC 2017, January 2017 

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FINN: A Framework for Fast, Scalable Binarized Neural Network Inference

Dec 01, 2016
Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Leong, Magnus Jahre, Kees Vissers

* To appear in the 25th International Symposium on Field-Programmable Gate Arrays, February 2017 

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