Picture for Robert Mullins

Robert Mullins

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors

Add code
Jun 07, 2025
Viaarxiv icon

Adversarial Suffix Filtering: a Defense Pipeline for LLMs

Add code
May 14, 2025
Viaarxiv icon

Watermarking Needs Input Repetition Masking

Add code
Apr 16, 2025
Viaarxiv icon

"I am bad": Interpreting Stealthy, Universal and Robust Audio Jailbreaks in Audio-Language Models

Add code
Feb 02, 2025
Figure 1 for "I am bad": Interpreting Stealthy, Universal and Robust Audio Jailbreaks in Audio-Language Models
Figure 2 for "I am bad": Interpreting Stealthy, Universal and Robust Audio Jailbreaks in Audio-Language Models
Figure 3 for "I am bad": Interpreting Stealthy, Universal and Robust Audio Jailbreaks in Audio-Language Models
Figure 4 for "I am bad": Interpreting Stealthy, Universal and Robust Audio Jailbreaks in Audio-Language Models
Viaarxiv icon

Complexity Matters: Effective Dimensionality as a Measure for Adversarial Robustness

Add code
Oct 24, 2024
Viaarxiv icon

Beyond Slow Signs in High-fidelity Model Extraction

Add code
Jun 14, 2024
Viaarxiv icon

Inverse Constitutional AI: Compressing Preferences into Principles

Add code
Jun 02, 2024
Viaarxiv icon

Locking Machine Learning Models into Hardware

Add code
May 31, 2024
Viaarxiv icon

Architectural Neural Backdoors from First Principles

Add code
Feb 10, 2024
Figure 1 for Architectural Neural Backdoors from First Principles
Figure 2 for Architectural Neural Backdoors from First Principles
Figure 3 for Architectural Neural Backdoors from First Principles
Figure 4 for Architectural Neural Backdoors from First Principles
Viaarxiv icon

LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation

Add code
Oct 06, 2023
Figure 1 for LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Figure 2 for LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Figure 3 for LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Figure 4 for LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation
Viaarxiv icon