Performance Bounds for Passive Sensing in Asynchronous ISAC Systems -- Appendices

This document contains the appendices for our paper titled ``Performance Bounds for Passive Sensing in Asynchronous ISAC Systems." The appendices include rigorous derivations of key formulas, detailed proofs of the theorems and propositions introduced in the paper, and details of the algorithm tested in the numerical simulation for validation. These appendices aim to support and elaborate on the findings and methodologies presented in the main text. All external references to equations, theorems, and so forth, are directed towards the corresponding elements within the main paper.

Color Segmentation on FPGA Using Minimum Distance Classifier for Automatic Road Sign Detection

Classification is an important step in machine vision systems; it reveals the true identity of an object using features extracted in pre-processing steps. Practical usage requires the operation to be fast, energy efficient and easy to implement. In this paper, we present a design of the Minimum Distance Classifier based on an FPGA platform. It is optimized by the pipelined structure to strike a balance between device utilization and computational speed. In addition, the dimension of the feature space is modeled as a generic parameter, making it possible for the design to re-generate hardware to cope with feature space with arbitrary dimensions. Its primary application is demonstrated in color segmentation on FPGA in the form of efficient classification using color as a feature. This result is further extended by introducing a multi-class component labeling module to label the segmented color components and measure their geometric properties. The combination of these two modules can effectively detect road signs as the region of interests.