Abstract:Mastering terminal environments requires language agents capable of multi-step planning, feedback-grounded execution, and dynamic state adaptation. However, training such agents is currently bottlenecked by a reliance on scraped external repositories, which limits domain diversity, environment controllability, and the targeting of specific capability deficits. We introduce LiteCoder-Terminal-Gen, a zero-dependency synthesis pipeline that autonomously generates executable and verifiable terminal training environments directly from domain specifications. Using this framework, we construct two large-scale resources: LiteCoder-Terminal-SFT, comprising 11,255 expert trajectories across 10 domains, and LiteCoder-Terminal-RL, featuring 602 verifiable environments for trajectory-level preference optimization. Supervised fine-tuning of Qwen-family models on our SFT dataset yields agents that significantly outperform their base counterparts. Notably, our 32B variant achieves 29.06%, 18.54%, and 34.00% pass@1 on Terminal Bench 1.0, 2.0, and Pro, respectively. Furthermore, applying Direct Multi-turn Preference Optimization (DMPO) on our RL environments yields additional performance gains. These results systematically demonstrate that fully synthetic, executable environments offer a scalable and verifiable supervision signal for mastering complex, real-world command-line workflows.
Abstract:As transistor sizes reach the mesoscopic scale, the limitations of traditional methods in ensuring thermodynamic consistency have made power dissipation optimization in transistor amplifiers a critical challenge. Based on stochastic thermodynamics, a transistor voltage amplifier model is first proposed as a new insight to investigate nonlinear relationships between the power dissipation and voltage gain for complementary symmetric voltage amplifier circuits (CSVACs). Utilizing the proposed model, the phenomenon, i.e., the power dissipation exponentially increases with the increase of voltage gain in CSVACs, is first clarified by an analytical expression to quantify the impact of voltage gain and input signal amplitude on the power dissipation. Considering the characteristic of power dissipation, a new multistage architecture is proposed to reduce the power dissipation in CSVACs. To optimize the power dissipation by adjusting the number of stages and the voltage gain at each stage, an optimal multistage scheme is proposed for multistage CSVACs. Simulation and experimental results show up to 99.36% and 94.59% power dissipation reduction compared with traditional CSVACs by the proposed optimal multistage scheme, respectively.