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Erik Börjeson

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

Dec 07, 2022
Keren Liu, Erik Börjeson, Christian Häger, Per Larsson-Edefors

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We design and implement an adaptive machine learning equalizer that alternates multiple linear and nonlinear computational layers on an FPGA. On-chip training via gradient backpropagation is shown to allow for real-time adaptation to time-varying channel impairments.

* To be presented at the 2023 Optical Fiber Communication Conference (OFC)

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