Assessment of Analog Time Multiplexing in SDM Digital to Analog Converters

Analog multiplexing for sigma delta modulated Digital to Analog Converters has been recently proposed as a means of achieving robustness. This preprint analyses said scheme via simulations. The main limitation introduced by the proposed architecture comes from mismatch in the DACs gain, which can drastically impact performances. A new technique of dynamic elements matching is proposed here to overcome this problem.

Analog Time Multiplexing for Digital-to-Analog Conversion

The signal bandwidth of Digital to Analog Converters based on Sigma Delta Modulation is limited by speed constrains. Time-Interleaving allows coping with complexity vs. speed by replacing the original architecture by M parallel paths. These path are clocked at a frequency M times smaller and their digital outputs time multiplexed. This is then converted to analog by means of a Digital to Analog Converter clocked at the high rate. This preprint proposes that time multiplexing be performed in the analog domain. As a result robustness against dynamic effects is achieved.