The signal bandwidth of Digital to Analog Converters based on Sigma Delta Modulation is limited by speed constrains. Time-Interleaving allows coping with complexity vs. speed by replacing the original architecture by M parallel paths. These path are clocked at a frequency M times smaller and their digital outputs time multiplexed. This is then converted to analog by means of a Digital to Analog Converter clocked at the high rate. This preprint proposes that time multiplexing be performed in the analog domain. As a result robustness against dynamic effects is achieved.