FPGA Implementation of Low-Power Multiplierless Pre-Processing Free Chromatic Dispersion Equalizer

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Dec 23, 2024
Geraldo Gomes, Pedro Freire, Jaroslaw E. Prilepsky, Sergei K. Turitsyn
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We present a novel time-domain chromatic dispersion equalizer, implemented on FPGA, eliminating pre-processing and multipliers, achieving up to 54.3% energy savings over 80-1280 km with a simple, low-power design.

* Paper Accepted at OFC 2025  
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