A TDM-based Analog Front-End for Ear-EEG Recording with 83-G$Ω$ Input Impedance, 384-mV DC Tolerance and 0.47-$μ$Vrms Input-Referred Noise

This paper presents the design of a time-division multiplexed capacitively-coupled chopper analog front end with a novel impedance boost loop (IBL) and a novel DC servo loop (DSL). The proposed IBL boosts the input impedance of the analog front end to up to several tens of G$\Omega$. It firstly utilizes an external IBL to prevent the total input impedance from degradation caused by parasitic capacitance from the ESD pad and external interconnections, and secondly relies on an internal IBL to compensate for the leakage current introduced by the chopper. The proposed DSL consists of a coarse DSL driven by square waveforms and a fine DSL driven by five phase-interleaving PWM waveforms, which up modulate the harmonics 5 times higher. An edge-pursuit comparator (EPC) is utilized to monitor the residual electrode offset voltage (EDO) at the LNA's output. Designed in a 0.18-$\mu$m CMOS process, the AFE consumes 4.5 $\mu$A from a 1.2-V supply. The simulated input referred noise is 0.47 $\mu$Vrms from 0.5 to 100 Hz in the presence of a 384-mV EDO. The proposed AFE achieves a high input impedance of 83 G$\Omega$ at 1 Hz and 9.3 G$\Omega$ at 100 Hz even with the presence of 20-pF parasitic capacitance.